The AMD64 ABI adds one additional field:
word8 | This specifies a 8-bit field occupying 1 byte. | |
---|---|---|
word16 | This specifies a 16-bit field occupying 2 bytes with arbitrary byte alignment. These values use the same byte order as other word values in the AMD64 architecture. | |
word32 | This specifies a 32-bit field occupying 4 bytes with arbitrary byte alignment. These values use the same byte order as other word values in the AMD64 architecture. | |
word64 | This specifies a 64-bit field occupying 8 bytes with arbitrary byte alignment. These values use the same byte order as other word values in the AMD64 architecture. |
The following notations are used for specifying relocations in table :
The AMD64 ABI architectures uses only Elf64_Rela relocation entries with explicit addends. The r_addend member serves as the relocation addend.
Name | Value | Field | Calculation |
R_X86_64_NONE | 0 | none | none |
R_X86_64_64 | 1 | word64 | S + A |
R_X86_64_PC32 | 2 | word32 | S + A - P |
R_X86_64_GOT32 | 3 | word32 | G + A |
R_X86_64_PLT32 | 4 | word32 | L + A - P |
R_X86_64_COPY | 5 | none | none |
R_X86_64_GLOB_DAT | 6 | word64 | S |
R_X86_64_JUMP_SLOT | 7 | word64 | S |
R_X86_64_RELATIVE | 8 | word64 | B + A |
R_X86_64_GOTPCREL | 9 | word32 | G + GOT + A - P |
R_X86_64_32 | 10 | word32 | S + A |
R_X86_64_32S | 11 | word32 | S + A |
R_X86_64_16 | 12 | word16 | S + A |
R_X86_64_PC16 | 13 | word16 | S + A - P |
R_X86_64_8 | 14 | word8 | S + A |
R_X86_64_PC8 | 15 | word8 | S + A - P |
R_X86_64_DPTMOD64 | 16 | word64 | |
R_X86_64_DTPOFF64 | 17 | word64 | |
R_X86_64_TPOFF64 | 18 | word64 | |
R_X86_64_TLSGD | 19 | word32 | |
R_X86_64_TLSLD | 20 | word32 | |
R_X86_64_DTPOFF32 | 21 | word32 | |
R_X86_64_GOTTPOFF | 22 | word32 | |
R_X86_64_TPOFF32 | 23 | word32 |
The special semantics for most of these relocation types are identical to those used for the Intel386 ABI. 4.24.3
The R_X86_64_GOTPCREL relocation has different semantics from the i386 R_I386_GOTPC relocation. In particular, because the AMD64 architecture has an addressing mode relative to the instruction pointer, it is possible to load an address from the GOT using a single instruction. The calculation done by the R_X86_64_GOTPCREL relocation gives the difference between the location in the GOT where the symbol's address is given and the location where the relocation is applied.
The R_X86_64_32 and R_X86_64_32S relocations truncate the computed value to 32-bits. The linker must verify that the generated value for the R_X86_64_32 (R_X86_64_32S) relocation zero-extends (sign-extends) to the original 64-bit value.
A program or object file using R_X86_64_8, R_X86_64_16, R_X86_64_PC16 or R_X86_64_PC8 relocations is not conformant to this ABI, these relocations are only added for documentation purposes. The R_X86_64_16, and R_X86_64_8 relocations truncate the computed value to 16-bits resp. 8-bits.
The relocations R_X86_64_DPTMOD64, R_X86_64_DTPOFF64, R_X86_64_TPOFF64 , R_X86_64_TLSGD , R_X86_64_TLSLD , R_X86_64_DTPOFF32, R_X86_64_GOTTPOFF and R_X86_64_TPOFF32 are listed for completeness. They are part of the Thread-Local Storage ABI extensions and are documented in the document called ``ELF Handling for Thread-Local Storage''4.4.