Mid-level RTL

As already discussed in chapter , one of major GCC problems is that its intermediate language, RTL, is too low level for modern optimizations. As described in chapter Jeff Law has been working on implementing mid-level RTL, a higher level counterpart to RTL. Once we finished basis of loop optimizer, we asked him how far he got in his efforts, as we desperately needed the mid-level RTL to progress on loop optimizers. He told us that he had not been able to work on it and asked us whether we can attempt to implement it, so we decided to do so.

Mid-level RTL has the same representation and semantics as low-level RTL, so all existing optimizers can use it directly. In fact it is implemented simply as yet another GCC target having its own machine description midrtl.md. The instruction set is highly regular RISC-style allowing optimizers to easily analyze and generate it.

We have virtualized all interfaces in dealing with RTL and we can switch the machine description during the code generation process that is done after second CSE pass. Instruction splitting pass is used to regenerate RTL chain in its low level representation and compilation continues.

We must mention, that our work is not quite finished in this respect, since all existing target descriptions need modifications in order to handle function call sequences correctly (we were unable to adapt current interface to the new form). We have updated i386 machine description and disabled mid-level RTL construction in all other targets for now. We plan to work with target machine description maintainers on getting majority of them updated while integrating our change to the official tree.

All our other changes are designed in a way that they do not require midlevel RTL, but benefit from it when available.